HYPERFLEX PROTOTYPING BOARD HF1-PC/104

The SSV HyperFlex technology offers reconfigurable I/O for PC/104- based embedded systems. The HF1-PC/104 is the first product for building prototype systems based on HyperFlex technology. This board is based on the Cypress CY37256P160-83AC Ultra37000 CMOS CPLD in a 160-pin Thin Plastic Quad Flat Pac (TQFP) package. For more information about this device please download or view the file 37000ds.pdf (1.213.116 bytes).

HF1-PC/104

The HF1 offers four CPLD Pinout Connectors, each with 40 pins and 2 mm spacing. All 160 pins of the Cypress CY37256P160 CPLD are direct wired to these connectors. There is also a big breadboard prototyping area with holes spaced at 2.54 mm (0.1") intervals for interface designs.

HF1-PC/104

The next figure shows the HF1-PC/104 block diagram with all important details. Please note that the HF1 offers two alternative power inputs: 1. the 16-bit PC/104 connector if the board is using within a PC/104- based embedded system and 2. a 8-pin double-row right-angle header with 2.54 mm spacing for stand-alone operation. The HF1 offers also a LED Array with 8 LEDs for status display applications. This array is using 8 I/O signals of the CY37256P160 CPLD.

HF1 Block Diagram

HF1 Key Features

  • High density CPLD with 256 macrocells
  • Simple CPLD timing model
  • In-system Reprogrammable (ISR) over JTAG
  • Flexible CPLD clocking
  • Programmable Bus Hold capabilities on all I/Os
  • 16-bit PC/104 connector
  • Generic 8-bit PC/104 I/O interface for CPLD
  • Power connector for stand-alone operation
  • LED Array with 8 LEDs for status displays
  • Removeable resitor network for LED Array
  • Prototyping area with 2.54 mm spacing
  • ISR JTAG connector
  • Only +5 VDC power
  • tbd mA current at 5 VDC
  • Operating temp. 0° to +70° C
  • Storage temp. -55° to +85° C
  • 5% to 95% relative humidity n/c

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SSV EMBEDDED SYSTEMS PC/104 Products. HF1. File: P167.HTM, Last Update: 21-Jun-2000
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